NXP Semiconductors /MIMXRT1011 /LPI2C1 /MCFGR0

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Interpret as MCFGR0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (HREN_0)HREN 0 (HRPOL_0)HRPOL 0 (HRSEL_0)HRSEL 0 (CIRFIFO_0)CIRFIFO 0 (RDMO_0)RDMO

CIRFIFO=CIRFIFO_0, RDMO=RDMO_0, HRPOL=HRPOL_0, HREN=HREN_0, HRSEL=HRSEL_0

Description

Master Configuration Register 0

Fields

HREN

Host Request Enable

0 (HREN_0): Host request input is disabled

1 (HREN_1): Host request input is enabled

HRPOL

Host Request Polarity

0 (HRPOL_0): Active low

1 (HRPOL_1): Active high

HRSEL

Host Request Select

0 (HRSEL_0): Host request input is pin HREQ

1 (HRSEL_1): Host request input is input trigger

CIRFIFO

Circular FIFO Enable

0 (CIRFIFO_0): Circular FIFO is disabled

1 (CIRFIFO_1): Circular FIFO is enabled

RDMO

Receive Data Match Only

0 (RDMO_0): Received data is stored in the receive FIFO

1 (RDMO_1): Received data is discarded unless the the Data Match Flag (MSR[DMF]) is set

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